In the year 2001, I published a paper entitled "A 80/20MHz 160mW Multimedia Processor integrated with Embedded DRAM" describing about the 2nd-generation RamP.
It integrates MPEG-4 accelerator, 3D Rendering Engine, ARM9 compatible RISC processor with enhanced MAC and the integrated DRAM frame buffer for Mobile Applications.
As the full-chip integration was done manually at that time, the floorplan is not that fancy.
It was, however, still great work to be carried in university.
Innovate or Die
2011/10
