In the year 2004, I presented the paper entitled "A 4.75GOPS single-chip programmable processor array consisting of a multithreaded processor and multiple SIMD and IO processors" at IEEE CICC (Custom Integrated Circuit Conference) in 2004.
CICC is the second biggest conference after ISSCC (International Solid-State Circuit Conference) for the chip designers.
Now the dual-core and quad-core is available at the market. Integrating nine processors including a multi-threaded processor on a single die is very aggressive challenge at that time.
The aim of the chip is implementing a system chip just by software programming.
The IO processors are dedicated to process concurrent IO behavior. SIMD(Single Instruction Multiple Data) processors process the media (video or audio) applications in parallel and multhreaded processor processes concuffent system behavior with fast context switching.
 Die Photo of Single-Chip Programmable Processor Array
2008/05/08 22:28 Donny  |
Innovate or Die
2011/10
